ESP8266

ESP-12F pinouts reference : How to use it in our designs
ESP8266 and ESP32

ESP-12F pinouts reference : How to use it in our designs

ESP-12F Pin Overview The ESP-12F module, based on the ESP8266EX, breaks out 22 pins. However, only 17 GPIO-related pins are practically usable, and several of them have important restrictions. Title in Other Languages German: ESP-12F Pinout-Referenz: Wie man es in eigenen Designs verwendet French: Référence du brochage de l’ESP-12F : Comment l’utiliser dans vos conceptions Spanish: Referencia de pines del ESP-12F: Cómo usarlo en tus diseños Italian: Guida ai pin di ESP-12F: Come usarlo nei tuoi progetti Portuguese (Brazil): Referência de pinagem do ESP-12F: Como usar em seus projetos Tip: Right-click anywhere on this page and choose “Translate to your language”. Complete Pin Reference Table Pin Label GPIO Type Boot/Strapping Function Notes ADC ADC0 Analog Input — 0–1.0V range only, no GPIO function EN (CH_PD) — Enable Must be HIGH to run Pull-up required (10kΩ) RST — Reset Active LOW Pull-up internally, can leave floating GPIO16 (XPD_DCDC) 16 I/O No pull-up/down, no interrupt support Used for deep-sleep wake-up (connect to RST) GPIO14 14 I/O HSCLK General purpose GPIO12 12 I/O HMISO General purpose GPIO13 13 I/O HMOSI General purpose GPIO15 15 I/O Strapping pin – must be LOW at boot HSPICS, has internal pull-down GPIO2 2 I/O Strapping pin – must be HIGH at boot UART1 TXD, internal pull-up GPIO0 0 I/O Strapping pin – boot mode select HIGH = normal boot, LOW = flash/programming mode GPIO4 4 I/O — Recommended for I2C SDA GPIO5 5 I/O — Recommended for I2C SCL GPIO9 (SD2) 9 I/O Used by SPI flash (in some modes) Avoid unless not using QIO flash mode GPIO10 (SD3) 10 I/O Used by SPI flash (in some modes) Avoid unless not using QIO flash mode RXD (GPIO3) 3 Input mostly UART0 RX Can be used as input-only GPIO if UART is not needed TXD (GPIO1) 1 I/O Strapping pin – must be HIGH at boot UART0 TX, affected by boot messages VCC — Power 3.3V only Not 5V tolerant GND — Ground — Multiple GND pins for thermal and RF performance Critical Design Considerations 1. Strapping Pins (Boot Mode Selection) These pins are sampled at reset/boot and determine boot behavior: Pin Must Be at Boot If Violated GPIO0 HIGH = run mode, LOW = flash mode Wrong boot mode GPIO2 HIGH Boot failure if pulled LOW GPIO15 LOW Boot failure if pulled HIGH or left floating Design rule: Avoid connecting these pins to devices that force them LOW or HIGH during power-up, such as LEDs, buttons, or external peripherals without proper pull resistors. 2. Input-Only / Restricted Pins GPIO3 (U0RXD): Mostly input-only when not used for UART0. This is the default UART0 receive pin for programming and debugging. If UART0 is inactive or remapped, GPIO3 can serve as a general input, but it is not a good choice for general output use. GPIO16: No pull-up/pull-down resistor, no interrupt support, and not suitable for PWM or I2C. It is mainly used for deep-sleep wake-up by connecting it to RST. ADC0: Analog input only, not a GPIO pin. Maximum input voltage is 1.0V. It is a 10-bit ADC, so the reading range is 0 to 1024. 3. Pins to Avoid for General GPIO Use GPIO6–GPIO11: Internally connected to the SPI flash memory. Do not use them unless you fully understand your flash mode configuration. GPIO9 and GPIO10: Especially risky in QIO flash mode and generally best avoided. GPIO1 (TX) and GPIO3 (RX): Usable as GPIO only if you do not need serial communication or debug output. 4. Power Considerations Requires a stable 3.3V supply. Peak current can reach approximately 300mA during Wi-Fi transmit bursts. Add decoupling capacitors close to the VCC pin, typically 100µF + 100nF. EN (CH_PD) must have a pull-up resistor, typically 10kΩ. If EN floats, the module may not boot. 5. Reset Behavior RST is active LOW. Add a pull-up resistor and, if needed, a small capacitor to GND for better noise immunity. Automatic reset circuits for auto-flashing often use RTS and DTR from a USB-to-serial converter through transistors or diodes. SPI and HSPI on ESP-12F The ESP8266 has two SPI controllers: SPI: Usually reserved for internal flash memory. According to datasheet these pin are internally connected to SPI flash chip and they are not available from outside. HSPI: Available for user applications such as displays, sensors, and SD cards ESP-12F HSPI Pin Mapping HSPI Function ESP8266 GPIO ESP-12F Physical Pin Name Description HSPI_MISO (Master In Slave Out) GPIO12 MISO / IO12 Data input to the ESP8266 HSPI_MOSI (Master Out Slave In) GPIO13 MOSI / IO13 Data output from the ESP8266 HSPI_CLK (Serial Clock) GPIO14 SCLK / IO14 Clock signal HSPI_CS (Chip Select) GPIO15 CS / IO15 / TXD2 Slave select / chip select Important Hardware Considerations for HSPI GPIO15 (HSPI_CS) Boot Strap Pin:GPIO15 is a boot strapping pin. For the ESP8266 to boot successfully from SPI flash, GPIO15 must be pulled LOW during boot, usually with a 10kΩ pull-down resistor. Design tip: If you connect a peripheral’s chip select pin to GPIO15, make sure the peripheral does not pull the line HIGH during startup, or the ESP-12F may fail to boot. GPIO12 (HSPI_MISO) Consideration:Depending on the flash configuration, GPIO12 can sometimes affect startup behavior if it is forced HIGH during boot. In most designs, it is safest to leave it floating or ensure it is not strongly driven during reset. Is I2C on the ESP8266/ESP-12F Hardware or Software? On the ESP8266, I2C is implemented as a software (bit-banged) peripheral. Unlike the ESP32, which has dedicated hardware I2C controllers, the ESP8266 does not expose a true hardware I2C peripheral on its standard GPIOs. Instead, the SDK and environments such as MicroPython typically implement I2C in software. Because it is software-based: You can use almost any two GPIO pins for SDA and SCL. It uses more CPU time than hardware I2C, but for most sensors, EEPROMs, and small displays, it works very well. Recommended I2C Pins For most tutorials and practical projects, the cleanest default choice is: Signal ESP8266 GPIO ESP-12F Pin Label NodeMCU Label Recommendation

18650 battery tester and capacity measurement
All Tutorials, ESP8266 and ESP32, MicroPython, Other articles

How to Build an 18650 battery capacity tester: Architecture & Logic

Part 1 – System Architecture and Firmware State Machine Introduction 18650 lithium ion cells are widely used in portable electronics, IoT devices, and energy storage systems. However, determining the actual capacity and health of a cell is not trivial. Many cells available on the market—especially reclaimed or recycled ones—have significantly degraded performance. To address this challenge, I designed a scalable 18650 battery capacity tester built around the ESP32 running MicroPython. The goal of the project was to build a reliable, cost effective, and extensible testing platform that can evaluate battery capacity and health while remaining flexible for future improvements. The system was designed with extensibility in mind. Future upgrades may include: Temperature based current control Fan speed regulation based on thermal conditions LCD interface for real time monitoring and logging Power path control to allow the device to operate from a battery during idle phases and low power consumption states (the discharge phase is lengthy but has low power consumption) Battery temperature monitoring Sending all recorded logs from ESP32 local storage to a web server via Wi-Fi (Wi-Fi is disabled during testing because it affects ADC, DAC, and GPIO functionality) A key design principle of this project was predictable and safe operation. For this reason, the firmware was implemented as a state machine, where each stage of the testing process is clearly defined. Firmware Architecture Battery testing involves multiple stages: validation, charging, resting, discharging, and measurement. Implementing this workflow with a state machine architecture makes the firmware easier to maintain, debug, and extend. Each state controls: Which hardware blocks are active Which measurements are taken Which conditions trigger a transition to the next state Title in Other Languages German: Wie man einen ESP32 18650 Batterie-Tester baut: Architektur & Logik French: Comment construire un testeur de batterie 18650 ESP32 : architecture et logique Spanish: Cómo construir un probador de baterías 18650 con ESP32: arquitectura y lógica Italian: Come costruire un tester per batterie 18650 con ESP32: architettura e logica Portuguese (Brazil): Como construir um testador de bateria 18650 com ESP32: arquitetura e lógica Tip: Right-click anywhere on this page and choose “Translate to your language”. Firmware Architecture: State Machine Design Below, I have added three different state machine diagrams to make the concept easier to understand. Colored Diagram Simple Diagram Advanced Digram A reliable battery tester must operate through clearly defined stages. To achieve predictable behavior and simplify debugging, the firmware was implemented as a state machine. Each state represents a specific phase of the test process and defines which hardware components are enabled or disabled. 1. IDLE State The IDLE state represents the safe standby mode of the device. The system waits for: Battery insertion User button press During this state: Disable all power paths Status LEDs remain off to indicate that the device is ready All outputs are disabled Battery, charge, and discharge circuits remain off This ensures that no current flows unintentionally and the system remains safe while waiting for user interaction. 2. CHECK_BATTERY Once a battery is detected, the system measures its voltage to determine whether the cell is safe to test. The following conditions are checked: If $Vbat < 1 V$ → invalid battery or connection error If $1 V le Vbat < 2.0 V$ → deep discharge condition (warning or rejection depending on policy) If $Vbat > 4.3 V$ → over‑voltage error If the voltage is within a valid range, the system proceeds to the next stage.Next state: DECIDE_CHARGE 3. DECIDE_CHARGE At this stage, the system determines whether the battery must be charged before the discharge test begins. Logic: If $Vbat < 4.10 V$ → the battery must be charged Otherwise → proceed directly to stabilization before discharge Next state: CHARGE or REST_BEFORE_DISCHARGE 4. CHARGE In this phase, the battery is charged using a TP4056 charger module. Actions performed: Disable all power paths Enable the battery path Enable the charging path Periodically measure battery voltage Monitor the TP4056 status pins Charging is considered complete when: The TP4056 indicates charge completion, or Battery voltage reaches approximately 4.18–4.20 V The firmware also checks for abnormal conditions: Voltage not increasing over time Charge timeout Unexpected over‑voltage conditions Next state: REST_BEFORE_DISCHARGE 5. REST_BEFORE_DISCHARGE Before starting the capacity measurement, the battery is allowed to rest. This phase is important because immediately after charging, the battery voltage is temporarily elevated due to surface charge. A rest period allows the open‑circuit voltage to stabilize. Actions: Disable all power paths Record voltage at the start and end of the rest period Typical rest duration: 5 to 20 minutesNext state: DISCHARGE 6. DISCHARGE (Capacity Measurement) This stage performs the actual capacity measurement. The system: Disables all power paths (resetting previous states) Enables the battery path Enables the discharge path Uses the ESP32 DAC output to control the discharge current Continuously measures battery voltage, shunt current, and elapsed time The battery capacity is calculated by integrating current over time: $$Capacity_{mAh} = sum I(mA) times Delta t(hours)$$ The discharge process stops when: Battery voltage reaches 3.0 V The target current cannot be maintained A fault condition occurs Next state: FINAL_RECHARGE 7. FINAL_RECHARGE After the discharge test completes, the battery is recharged again. This step ensures the battery is returned to a usable state after testing. Important clarification: This step is adjusted based on the battery’s intended use. For storage, the battery should be charged up to 3.9 V, but for immediate use, the battery is charged again to approximately 4.2 V. I chose the storage voltage for my design. Actions: Disable all power paths Enable the battery path Enable the charging circuit Monitor voltage and TP4056 status Completion occurs when: TP4056 indicates full charge, or Battery voltage reaches 3.9 V, checked by disabling the charge path every minute Next state: REST_BEFORE_IR 8. REST_BEFORE_IR After charging, another stabilization period is required before measuring internal resistance. This ensures that the voltage measurement reflects the true open‑circuit voltage of the battery. Rest time: 5–20 minutesNext state: MEASURE_IR 9. MEASURE_IR (Internal Resistance Measurement) Battery internal resistance provides valuable information

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